Course syllabus for Methods for electronic system design and verification

Course syllabus adopted 2021-02-10 by Head of Programme (or corresponding).

Overview

  • Swedish nameKonstruktionsmetodik för elektroniksystem
  • CodeDAT110
  • Credits7.5 Credits
  • OwnerMPEES
  • Education cycleSecond-cycle
  • Main field of studyComputer Science and Engineering, Electrical Engineering
  • DepartmentCOMPUTER SCIENCE AND ENGINEERING
  • GradingTH - Pass with distinction (5), Pass with credit (4), Pass (3), Fail

Course round 1

  • Teaching language English
  • Application code 15117
  • Maximum participants42
  • Minimum participants10
  • Block schedule
  • Open for exchange studentsYes

Credit distribution

0107 Written and oral assignments 7.5 c
Grading: TH		0 c7.5 c0 c0 c0 c0 c

In programmes

Examiner

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Eligibility

General entry requirements for Master's level (second cycle)
Applicants enrolled in a programme at Chalmers where the course is included in the study programme are exempted from fulfilling the requirements above.

Specific entry requirements

English 6 (or by other approved means with the equivalent proficiency level)
Applicants enrolled in a programme at Chalmers where the course is included in the study programme are exempted from fulfilling the requirements above.

Course specific prerequisites

Digital circuits and hardware description languages corresponding to Design of digital electronic systems (DAT094) and Introduction to integrated circuit design (MCC092).

Aim

In light of the fact that we can integrate billions of transistors on a single integrated circuit, electronic system designers are forced to make use of computer-aided design tools, so-called Electronic Design Automation (EDA) tools, to manage design complexity and to meet, for example, strict timing, power dissipation and time-to-market budgets. Thus, apart from having skills in each of the abstraction levels, like circuit, logic, and architecture design, an electronic system designer must have a thorough understanding of design and verification methods that span the different abstraction levels and the algorithms that are leveraged inside the EDA tools.

The purpose of this course is to strengthen the student's knowledge in EDA-based design and verification methods and to make the student proficient in utilizing the right EDA tools, in the right context and in the right sequence.

Learning outcomes (after completion of the course the student should be able to)

1. describe the algorithmic principles of a number of important EDA concepts, such as behavioral and logic synthesis, logic simulation, static timing analysis, timing closure and power dissipation analysis
2. describe contemporary EDA design flows and their fundamental weaknesses and strengths
3. apply Linux-based EDA tools, including simple shell scripts, for design and verification of digital electronic systems
4. perform timing-driven synthesis and power dissipation analysis for digital circuits
5. critically and systematically integrate knowledge, to model, simulate, and evaluate features of digital ASIC design flows
6. clearly and unambiguously communicate his/her conclusions of laboratory work and in-depth term paper studies, the knowledge and rationale underpinning these.


Content

The lecture series, which mirrors the overall content of the course, covers:
 - Terminology and structure of EDA systems.
 - Design of electronic systems that are based on both software and hardware.
 - Functional verification.
 - Behavioral and logic synthesis.
 - Timing analysis.
 - Power and energy analysis.
 - Variability.
 - Physical design.
 - Design for test and manufacturability.
 - Discrete mathematics and optimization relevant to EDA.
 - Technical writing.

Beside the lecture on technical writing, there is also one peer-response workshop where the students get to develop their writing skills by reading and commenting on a draft from another term paper group.

Organisation

The pedagogical concept of the course rests on three cornerstones:

lectures: these mainly supply the design and verification context of advanced electronic systems containing software and hardware.
lab exercises: these offer comprehensive hands-on training on industrially relevant design and verification problems using state-of-the-art EDA systems (from Cadence and Synopsys).
term paper work: this gives the student an opportunity to study state-of-the-art research-level texts, which allows the student to focus on an appropriate and interesting technical area and at the same time obtain training in reading research papers and practice technical writing.

Literature

Main textbook: Electronic Design Automation for Integrated Circuits Handbook - 2 Volume Set, by L. Lavagno, G. Martin, and L. Scheffer, CRC Press, 2006, ISBN 9780849330964. (This book edition is also available from within Chalmers, as an electronic book.)

Electronic Design Automation for Integrated Circuits Handbook, 2nd Edition, by L. Lavagno, I. L. Markov, G. E. Martin, and L. K. Scheffer, CRC Press, 2016, ISBN 9781482254501.

Supplemental scientific papers for the group work on term papers.

Examination including compulsory elements

The examination has two parts:

Lab exercises, including synthesis and place-and-route for ASICs: 60% of total course grade is based on quality of preparation, VHDL hand in, and lab report.
Term paper work (in teams of 3 students) on selected topics, including a term paper report and an oral presentation: 40% of total course grade is based on quality of term paper report and oral presentation.

The course examiner may assess individual students in other ways than what is stated above if there are special reasons for doing so, for example if a student has a decision from Chalmers on educational support due to disability.