Course syllabus adopted 2024-02-02 by Head of Programme (or corresponding).
Overview
- Swedish nameKonstruktion av digitala elektroniksystem
- CodeDAT094
- Credits7.5 Credits
- OwnerMPEES
- Education cycleSecond-cycle
- Main field of studyComputer Science and Engineering, Electrical Engineering
- DepartmentMICROTECHNOLOGY AND NANOSCIENCE
- GradingTH - Pass with distinction (5), Pass with credit (4), Pass (3), Fail
Course round 1
- Teaching language English
- Application code 15117
- Maximum participants48
- Block schedule
- Open for exchange studentsNo
Credit distribution
Module | Sp1 | Sp2 | Sp3 | Sp4 | Summer | Not Sp | Examination dates |
|---|---|---|---|---|---|---|---|
| 0120 Laboratory 7.5 c Grading: TH | 7.5 c | 0 c | 0 c | 0 c | 0 c | 0 c |
In programmes
- MPEES - EMBEDDED ELECTRONIC SYSTEM DESIGN, MSC PROGR, Year 1 (compulsory)
- MPEPO - SUSTAINABLE ELECTRIC POWER ENGINEERING AND ELECTROMOBILITY, MSC PROGR, Year 2 (elective)
- MPHPC - HIGH-PERFORMANCE COMPUTER SYSTEMS, MSC PROGR, Year 2 (elective)
- MPICT - INFORMATION AND COMMUNICATION TECHNOLOGY, MSC PROGR, Year 2 (elective)
- MPSYS - SYSTEMS, CONTROL AND MECHATRONICS, MSC PROGR, Year 2 (elective)
Examiner
- Lars Svensson
- Associate Professor, Microwave Electronics, Microtechnology and Nanoscience
Eligibility
General entry requirements for Master's level (second cycle)Applicants enrolled in a programme at Chalmers where the course is included in the study programme are exempted from fulfilling the requirements above.
Specific entry requirements
English 6 (or by other approved means with the equivalent proficiency level)Applicants enrolled in a programme at Chalmers where the course is included in the study programme are exempted from fulfilling the requirements above.
Course specific prerequisites
Basic courses in logic design and electronic circuits. Basic skills in hardware description languages (VHDL or Verilog).Aim
The course combines an overview of design platforms with in-depth studies of selected topics to give the student practical insights into building advanced embedded electronic systems. The emphasis is on design of digital hardware based on hardware-description languages and similar tools and representations. The abstraction level ranges from designing small-scale combinational and sequential logic to managing data flow between larger modules. Non-functional requirements such as performance are founded at the electronic level.Learning outcomes (after completion of the course the student should be able to)
- Specify hardware behavior using hierarchical and parameterized descriptions.- Implement and verify digital parts of electronic systems in FPGAs using hardware description languages (HDLs) and simple design tools such as HDL simulators and synthesizers.
- Discuss how design decisions can affect costs for design, manufacturing, and use of digital electronic systems and components.
- Explain costs, performance, and other significant properties of common technology platforms (FPGA, ASIC, software on off-the-shelf processor, components on PCBs, ...).
- Discuss methods for communication and synchronization between hardware blocks; and choose a suitable method based on capacity and costs.
- Write a lab report with presentation of quantitative results, with a balanced use of text and data (graphical and tabular) and suitable data commentary.
Content
The course covers fundamental design aspects of digital electronic systems, with emphasis on modern HDL- and tool-based methods. It builds on and extends undergraduate-level konowledge and skills. The content is presented in four main themes:
- Combinational and sequential logic: gate-level and RTL descriptions; finite state machines; hardware description languages (HDLs).
- Hierarchy and arithmetic: instantiation and parameterization; HDL- and script-based parameterization; number representations.
- Non-functional aspects and cost measures: hardware amount / chip area; bandwidth, latency, power; pipelining, iteration bounds; hardware technology alternatives.
- Inter-block communication: buses, handshaking, protocols, metastability; networks-on-chip; FIFO buffers; clock domains.
The lab sessions are based on configurable hardware (FPGA) which is programmed in VHDL and C/C++/SystemC.
Organisation
The main themes are each built from lectures, exercise sessions, homeworks and compulsory lab sessions. Lab reports and other submissions are used for grading.Literature
VHDL literature is useful for the lab course and for subsequent courses in the EESD program. We recommend the textbook Dally et al: "Digital Design Using VHDL: a Systems Approach", and the reference book Ashenden: "Designer's Guide to VHDL" (the latter is also available as an E-book at the Chalmers library). Other good VHDL books may also be used. Research articles and other supplementary material will be made available during the course.Examination including compulsory elements
Examination and grading is based on completion of compulsory lab sessions and on compulsory and optional submissions in each theme. A passing grade for each theme is required to pass the course.The course examiner may assess individual students in other ways than what is stated above if there are special reasons for doing so, for example if a student has a decision from Chalmers on educational support due to disability.