Title: Investigation of Trapping Effects due to buffer/back-barrier design and gate processing of high frequency GaN HEMTs
Overview
- Date:Starts 26 November 2024, 10:00Ends 26 November 2024, 11:00
- Location:
- Language:English
Main supervisor: Niklas Rorsman, Research Professor, Microwave Electronics, Microtechnology and Nanoscience
Assist Supervisor: Mattias Thorsell , PhD, Microwave Electronics, Microtechnology and Nanoscience
Examiner: Herbert Zirath, Full Professor, Microwave Electronics, Microtechnology and Nanoscience
Discussion leader: Martin Fagerlind, PhD Microtechnology and nanoscience, Device physics researcher at Ampleon
Abstract: In the development of microwave power amplifiers, rugged low noise amplifiers and switches, AlGaN/GaN HEMTs have become the preferred technology in the infrastructure for wireless communication and in radar systems. The pathway for improving high frequency performance of GaN HEMTs has been through lateral and vertical downscaling of device dimensions. This presentation covers techniques used for lateral and vertical downscaling and sheds light on how it affects DC and RF performance of the devices.
In the first study, vertical downscaling is addressed. Where the impact of different carbon concentrations in the Al0.06Ga0.94N graded back-barrier and GaN buffer of high electron mobility transistors (HEMTs) is investigated. It is shown that the back-barrier effectively prevents buffer-related electron trapping. The highest C-doping provides the best 2DEG confinement, while lower carbon doping levels are beneficial for a high output power and efficiency. The C-profiles acquired by using Secondary Ion Mass Spectroscopy (SIMS), in combination with DCTS is used to explain the electron trapping effects. Traps associated with the C-doping in the back-barrier are identified and the bias ranges for the trap activation are discussed. The study shows the importance of considering the C-doping level in the back-barrier of microwave GaN HEMTs for power amplification and generation.
The second study, lateral downscaling processing is addressed. Where the impact of Fluorine plasma NF3/CF4 used for gate opening of passivation first SiNx, on Al0.3Ga0.7N/GaN High Electron Mobility Transistors (HEMTs) is investigated. The consequences for device performance due to F-implantation, surface chemistry modification and crystal structure degradation due to F plasma exposure are addressed. Additionally, by employing a wide range of pre gate annealing strategies, device recovery is studied. Although DC characteristics benefit from pre gate annealing, pulsed-IV (PIV) measurements display that drain- and gate-lag characteristics suffer from extended high temperature pre gate annealing treatments. Utilizing X-ray Photoelectron Spectroscopy (XPS) and Drain Current Transient Spectroscopy (DCTS) the device characteristics can be explained as activation and de-activation of trap states are induced by either F plasma and/or pre gate annealing. This study provides general guidance on how pre gate annealing can improve device performance after F plasma treatment.